Octal450

Hello, Sorry for so quick update again. But, many fixes to the xFlasher implementation post release of the tool! V3.0.2b: - Added: xFlasher support for Xilinx XC2C64A-VQ100 for Matrix "Super-Big-IC" - Added: Better grabbing of CPLD type for xFlasher - Added: Ability to abort xFlasher SPI read/write via Esc key - Fixed: Incorrect display of xFlasher initializing - Fixed: Post-release bugs with xFlasher implementation - Fixed: 32-bit xFlasher dependancy detection - Fixed: Crashing issue with xFlasher and some antivirus software - Fixed: Various bugs and usability issues FYI: xFlasher does not support Windows XP due to driver problems. Please use Windows Vista SP2 or later. Kind Regards, Josh

My pleasure! Kind Regards, Josh PS: For some reason, Microsoft thinks J-Runner is a "KeyGen". This is false positive

July Update released to auto-update. V3.0.2: - Added: Totally redone xFlasher integration with custom SPI DLL - Added: xFlasher now shows blocks during read/write and proper progress - Added: xFlasher alerts user when trying to write a eMMC image in SPI mode - Added: xFlasher alerts user when trying to program a timing in eMMC mode - Added: Clean SMC building option for Retail and DEVGL - Added: Support for the final xFlasher product - Added: Support XDKbuild - Added: Improved updater - Added: Automatic detection of xFlasher dependencies - Fixed: Invalid hack types not greyed out after setting board type - Fixed: Zephyr timing info - Fixed: Buggy and bad handling of Winbond 2K radio buttons - Fixed: Various bugs and usability issues - Changed: Updater now shows download progress - Changed: Fixed dashlaunch XeBuild settings This release is out a little early in order to properly support the final xFlasher product. Shoutout Mena to who figured out how to get the SPI library to compile properly -> it was broken when we got it, as well as for finding the xFlasher speed boost! Shoutout Xvistaman2005 for XDKbuild. Shoutout Element18592 for the xFlasher, its great hardware! Kind Regards, Josh

My pleasure. Hope you enjoy. Kind Regards, Josh

Hi @mafia4 The included XeLL and ECCs already support winbond 2k E slims (I've done many of em). Reminder that the only thing the Winbond patches do is updated the CBB bootloader as the original one for RGH2 (13121), and doesn't know how to deal with 2k winbond ram (slim S winbond ram is knows how to do though). It updates to the 13182 CBB. However, the latest version of the XeLL ECCs support this and thus special XeLLs for Winbonds is no longer needed. I may recompile the Glitch2 ECCs though with the updated XeLL used in the XeBuilds though. Kind Regards, Josh

My pleasure! Kind Regards, Josh

Hello, This months' update 3.0.1 is now released to autoupdate. Changelog: V3.0.1: - Added: XeBuild and Dashlaunch version info - Added: F3 and F4 shortcut keys to open Program Timing File and Custom Nand Args - Added: Updater now shows changelog - Added: xFlasher can now handle Xenon/Zephyr/Falcon 64MB (Devkit) NANDs - Added: 0 Fuse DEVGL building options - Fixed: Cannot write ECCs via Custom Nand Args with xFlasher - Fixed: Glitch ECC made on 14699 and older NAND even if Glitch2 is selected - Fixed: Various bugs and usability issues - Fixed: Buggy and bad handling of hack type radio buttons - Fixed: Zephyr radio buttons didn't properly deselect other timing groups - Fixed: Patching or extracting NANDs doesn't save to working folder - Fixed: Name of XC2C64A showing as XC2C64 - Changed: Creating NAND from scratch does not require an SMC.bin if using Glitch2 CR4 or SMC+ SMCs - Changed: Made xFlasher detect motherboards faster - Changed: Huge improvements to COM Port Monitor - Changed: Cleanup some UI elements - Changed: Updates to some included timing files Noticeable change in behavior are: Timing File Programming menu opens to the selected console's page automatically, you can now use CR4 and SMC+ for Glitch2m images, and a totally new com monitor. A silent change is that we *should* be able to Program OpenXeniums via xFlasher (or squirt) now, but I can't test it quite yet. Kind Regards, Josh

My pleasure @ronsonol! Btw, the OpenXenium programming should be available in one of the next updates. Kind Regards, Josh

@ronsonol Try: https://drive.google.com/file/d/1o87_T6MZ5uyoQ8C1hy_tBdCOKHXbI3kx/view?usp=sharing Added 150s. Try the 0.5s. Sorry only those values can be made. Adjustment is only by integer in the code and cannot be inbetween, at lower freq less precision for adjustment. Kind Regards, Josh

@ronsonol Great! I will batch compile a bunch of 150s and add to the pack. Maybe you can better result. You get mostly short or long third blinks? Kind Regards, Josh

@ronsonol Here: https://mega.nz/file/TQMl1QLI#kWMv2BRHFMI-ynnPjc4qFkwTNre1_O3tNIJDzB0AJYM Try this. Should work. If it does I'll make a few 150's to tune more. Kind Regards, Josh

@Bazatree No need, I can use from my XDK. But thanks! @ronsonol Thanks, I will have the file for you soon - just a bit busy rn. Kind Regards, Josh

Hi @ronsonol INTERESTING... maybe for some reason your ace doesn't like 300mhz counting... (weird crystal?) If I go build you a file off the 150 MHz instead would you try it for me? Kind Regards, Josh

zephyr_150_E_2_L_1 = timing 27452 length 1 @ 150 MHz @ 300 MHz 54904 length 2 So if zephyr_150_E_2_L_1 works you should also have luck on ZE_L_0.6_T_69.3 or perhaps ZE_L_0.5_T_69.3 in my new release. (in J-Runner too) Kind Regards, Josh

Hi @ronsonol Glad you enjoy. All X360ACE files uses 150 MHz, but we can get 300 MHz by process on the rising and falling edges of the clock to get more precision. zephyr_150_E_1_L_1 = timing 27451 length 1 @ 150 MHz @ 300 MHz 54902 length 2 So if zephyr_150_E_1_L_1 works you should also have luck on ZE_L_0.6_T_68.7 or perhaps ZE_L_0.5_T_68.7 in my new release. (in J-Runner too) You can tune there a bit more precisely. The SMC+ for Falcon/Zephyr is not as fast as Jasper/Slim because those consoles take longer due to larger bootloaders. It will decrease the timeout from AF to 8A. Watch closely and you will notice. The reason the log is different as for SMC+, it builds in the SMC so the XeBuild does not need to patch it. But for without, the SMC from the nand is used and thus it must be patched for Glitch. Normal. Kind Regards, Josh

I don't think J-Runner knows what to do with 64MB small block images. I will look into this at some point in the future. EDIT: 7/3/2023 - this is now supported in V3.3.0. Kind Regards, Josh

Hi Now J-Runner V3.0.0d is available to auto-update. Original links in OP are still the latest V3.0.0d: - Added: FTDI support for Xilinx XC2C64A-FG48 for Matrix "small-IC" - Added: FTDI can now detect and check flash configs and motherboards - Added: FTDI automatic board type detection on reading/writing - Added: Query console button works with xFlasher now - Fixed: Cannot write JTAG XeLL bins with xFlasher - Fixed: Bug with timing programming of Zephyr timings - Fixed: Various bugs and usability issues - Fixed: Scan IP for console bug - Changed: Tweaks to included timing files Kind Regards, Josh

Hi Sorry for late response. ace is better, but maybe you need 2k patches. @robbiejmsn I'm not really familiar with the OG scene, you'd have to give me a little more info on exactly what would be done. Kind Regards, Josh

Basically, it's S-RGH ported to XC2C64A, and to make that fit I switched to CR4 style "debug slowdown" (The I2C logic takes a LOT of space on the CPLD). When the debug goes high, SMC sends the slowdown I2C. When debug goes low, SMC sends the speedup I2C. That leaves enough space for delayers which allows SMC+ to work (and why I added CR4 instructions to SMC+) There are 2 working versions: - 150mhz quartz incrementing on rising and falling edge for 300mhz - 48mhz quartz, with a clock doubler to 96mhz (delay for half + xor), then incrementing on both sides for 192mhz Possibly a 100mhz version too counting at 200mhz. The clock doublers are not totally stable so better to use higher quartz. Kind Regards, Josh

Hi @Eruil See the XeLL basic features, also fixed the USB remount bug and other improvements http://prntscr.com/11t7r7n SMC+ 1.1 don't change anything for X360ACE. The update is to allow for future glitch methods I am working on: YouTube Demo Glad you enjoy! Kind Regards, Josh

Fyi, I figured out how to make the flash config logic work properly for the FTDI (xFlasher, Squirt programmer) needs bugfixing and some tweaks but overall I was able to get that implementation working - no more need to select nand sizes every time, it only asks if it encounters a weird. Update will come out before the xFlasher releases publically but I want to wait as long as possible to avoid constant updates... Kind Regards, Josh

V3.0.0c: - Added: SMC+ 1.1: CR4 slowdown instructions added - Fixed: Various bugs and usability issues - Changed: Improved xFlasher Glitch Chip detection Also resolves a false positive by one AV by tweak to the code. Should be good now. Kind Regards, Josh

V3.0.0b: - Added: 6717 Retail generation - Fixed: Bug in xFlasher Implementation - Fixed: Bugs in UI - Changed: Timing Assistant Jasper Updated Update pushed via autoupdate. Existing links updated. Kind Regards, Josh

@Eruil - you mean a screen capture? I can try to take a photo later if you wish. I have never had any issues on 1175 or hitachi DVD drives on this version, I can't recall whether it was specifically fixed or not, we did use the latest XeLL source. Kind Regards, Josh

Hello, I don't have any Cygnos so it would be tricky to get working right. I'd need to get hold of one first. Kind Regards, Josh