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Octal450

J-Runner with Extras (17559) - Built in Timings, Bugfixes, and New Features!

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Hi @gonza3

Working here. Please let me know if it happens again.

Thanks

PS: Our new Auto-update will be added in the next release, no need to manually maintain the release. It will ask if you want to update when the update is available.

Kind Regards,
Josh

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After all, ECC cannot be written using MTX SPI NAND Flasher V1.0.
When I try to write ECC to another Corona V3, it closes immediately after the nand pro window opens as before.
When I uncheck Matrix Flasher Mode and try to write ECC, it becomes IoTimed Out as shown below and writing fails.
I can read nand and flash Timing File to Matrix v1 and Ace v3.
I Used Windows 10 64bit PC

I was able to write ECC using another J-Runner with the nand wiring as it is.
I Used Windows 7 64bit PC

Log
ECC created
Version: 01
Flash Config: 0x00043000
Writing Nand
image_00000000.ecc
Failed to write 0x0 block
Failed to write 0x1 block
Failed to write 0x2 block
Failed to write 0x3 block
Failed to write 0x4 block
IoTimedOut
Failed to write 0x5 block
Failed to write 0x6 block
------
Failed to write 0x4E block
Failed to write 0x4F block
Done!
in 0:28 min:sec

Since the phenomenon of failing due to IoTimed Out occurred in another J-Runner before
I think there is a problem with my Windows 10 64bit PC
Currently I can write ECC using another J-Runner Windows 7 64bit PC
There seems to be something wrong with J-Runner with Extras.

I installed the driver below
Nand&CoolRunner_Flasher_USB_v1.1/XSVF/LIBUSB_DRIVER
Device Manager
libusb-win32 devices/MemoryAccess

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Hi,

OK interesting. IOTimeOut happens due to something weird with the USB libraries... I was never able to find the exact version required to fix it.

I will have someone with an MTX flasher test this asap and provide a debug.

 

Kind Regards,
Josh

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@gonza3 Seems to be something with Corona 16MBs, a Trinity worked fine. 

I have a MTX USB on my way to me, so I can debug and fix this first hand.

Thanks for your patience. 

PS: The next release will also have support for the new xFlasher from The Mod Shop ;)

Kind Regards,
Josh

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Hi Octal! Great job, your SMC+ timings are really fast and stable! 
Wanted to ask is there any possibility to integrate into j-runner support of squirt programmer (it is FTDI chip based). AutoGG works with it and I can say that this programmer is really fast! (about 1:30 sec. for 16mb
, and about 5 min for 64mb jasper BB). It is almost twice as fast as nand-x! But personally I don’t like AutoGG at all :(.

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@Achm3t

Hi thx for your feedback glad you like it.

Actually I did put FTDI chip support in for The Mod Shop's xFlasher. So that should work too. You have Discord? If you want I can let you test it.

Kind Regards,
Josh

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Hi

New 3.0.0 version!!! Why the jump? Because new versioning systems... and some many internal changes.

Some highlights:

V3.0.0:
- Added: Update check and auto update
- Added: Native xFlasher support (and squirt)
- Added: SVF programming with xFlasher
- Added: New RGH2 timings for Zephyr
- Fixed: DemoN never sets progress to 100%
- Fixed: No chime on 4GB
- Fixed: Various bugs and usability issues
- Fixed: Scan IP for console

I suggest strongly updating to 3.0.0 version.

Download in OP

Screenshots in first post.

Kind Regards,
Josh

 

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8 hours ago, Octal450 said:

Hi

New 3.0.0 version!!! Why the jump? Because new versioning systems... and some many internal changes.

Some highlights:

V3.0.0:
- Added: Update check and auto update
- Added: Native FTDI support (for xFlasher and others)
- Added: SVF programming with FTDI
- Added: RGH1 timings with visual debug
- Added: New RGH2 timings for Zephyr
- Fixed: DemoN never sets progress to 100%
- Fixed: No chime on 4GB
- Fixed: Various bugs and usability issues
- Fixed: Scan IP for console

I suggest strongly updating to 3.0.0 version.

Full Pack: https://cdn.octalsconsoleshop.com/J-Runner with Extras.zip
2.9.7 to 3.0.0 Delta: https://cdn.octalsconsoleshop.com/JR-297-300-Delta-Update.zip
VirusTotal: https://www.virustotal.com/gui/file/a569e6703b51bf062121a87741580e0da8dd39b7a2a425bdc8fb0bc2107bda08/detection

Screenshots in first post.

Kind Regards,
Josh

 

Hey thanks for the update octal! I was wondering if you can make a JRunner to be compatible with Cygnos360 v2 like Demon?

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Hello,

I don't have any Cygnos so it would be tricky to get working right. I'd need to get hold of one first.

Kind Regards,

Josh

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On 11/21/2020 at 7:57 AM, Octal450 said:


- Tweaked XeLL RELOADED:
----- Displays Console LDV
----- Displays Motherboard type
----- Displays serial number for console and board (board S/N CANT EVER CHANGE) (prevent scams)
----- Fixed USB refresh bug
 

 

do you have any capture of your xell version? does it work with mupen beta 2 and 1175 / hitachi drives ? 

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@Eruil - you mean a screen capture? I can try to take a photo later if you wish.

I have never had any issues on 1175 or hitachi DVD drives on this version, I can't recall whether it was specifically fixed or not, we did use the latest XeLL source.

Kind Regards,
Josh

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V3.0.0b:
- Added: 6717 Retail generation
- Fixed: Bug in xFlasher Implementation
- Fixed: Bugs in UI
- Changed: Timing Assistant Jasper Updated

Update pushed via autoupdate. Existing links updated.

Kind Regards,
Josh

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V3.0.0c:
- Added: SMC+ 1.1: CR4 slowdown instructions added
- Fixed: Various bugs and usability issues
- Changed: Improved xFlasher Glitch Chip detection

Also resolves a false positive by one AV by tweak to the code. Should be good now. 

Kind Regards,
Josh

 

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Fyi, I figured out how to make the flash config logic work properly for the FTDI (xFlasher, Squirt programmer)

needs bugfixing and some tweaks but overall I was able to get that implementation working - no more need to select nand sizes every time, it only asks if it encounters a weird.

Update will come out before the xFlasher releases publically but I want to wait as long as possible to avoid constant updates...

Kind Regards,

Josh

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On 3/25/2021 at 3:20 PM, Octal450 said:

@Eruil - you mean a screen capture? I can try to take a photo later if you wish.

I have never had any issues on 1175 or hitachi DVD drives on this version, I can't recall whether it was specifically fixed or not, we did use the latest XeLL source.

Kind Regards,
Josh

yup. a screen capture should help :D. i made a new updflash for my console with your smc+ patch. runs very well ,  i thank you for that , jrunner works fine 

is there any smc + 1.1 improvement in slim consoles with ace chips? 

 

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22 minutes ago, Octal450 said:

Hi @Eruil

See the XeLL basic features, also fixed the USB remount bug and other improvements ;) http://prntscr.com/11t7r7n

SMC+ 1.1 don't change anything for X360ACE. The update is to allow for future glitch methods I am working on: YouTube Demo

Glad you enjoy!

Kind Regards,
Josh

oh , i see. its  for matrix or any programable x2c64 based glitchip to work as a CR4 (muffin improvement).  cool ;D 

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Basically, it's S-RGH ported to XC2C64A, and to make that fit I switched to CR4 style "debug slowdown" (The I2C logic takes a LOT of space on the CPLD). When the debug goes high, SMC sends the slowdown I2C. When debug goes low, SMC sends the speedup I2C. That leaves enough space for delayers which allows SMC+ to work (and why I added CR4 instructions to SMC+)

There are 2 working versions:

- 150mhz quartz incrementing on rising and falling edge for 300mhz

- 48mhz quartz, with a clock doubler to 96mhz (delay for half + xor), then incrementing on both sides for 192mhz

Possibly a 100mhz version too counting at 200mhz. The clock doublers are not totally stable so better to use higher quartz.

Kind Regards,
Josh

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23 hours ago, Octal450 said:

Basically, it's S-RGH ported to XC2C64A, and to make that fit I switched to CR4 style "debug slowdown" (The I2C logic takes a LOT of space on the CPLD). When the debug goes high, SMC sends the slowdown I2C. When debug goes low, SMC sends the speedup I2C. That leaves enough space for delayers which allows SMC+ to work (and why I added CR4 instructions to SMC+)

There are 2 working versions:

- 150mhz quartz incrementing on rising and falling edge for 300mhz

- 48mhz quartz, with a clock doubler to 96mhz (delay for half + xor), then incrementing on both sides for 192mhz

Possibly a 100mhz version too counting at 200mhz. The clock doublers are not totally stable so better to use higher quartz.

Kind Regards,
Josh

do you think that it can work on a stuborn corona with samsung nand + samsung rams? . i tried to do a RGH installation in my cousins console but it only shown xell screen 1 time and when i created xebuild nand it hanged up at the 3rd try to boot (i tried with ace and Sonic 360 with  muffin timmings) . sonic 360 has a 100 mhz oscilator ( its a spanish chip)  

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Thanks Josh, this is awesome.

Quick question, is there a chance that with the resurgence of OG Xbox modding due to the release of the XboxHD+ board you or someone like-minded can add support for setting up a xenium chip via the J-tag?

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Hi Sorry for late response.

Quote

do you think that it can work on a stuborn corona with samsung nand + samsung rams?

ace is better, but maybe you need 2k patches.

@robbiejmsn

Quote

Quick question, is there a chance that with the resurgence of OG Xbox modding due to the release of the XboxHD+ board you or someone like-minded can add support for setting up a xenium chip via the J-tag?

I'm not really familiar with the OG scene, you'd have to give me a little more info on exactly what would be done.

Kind Regards,
Josh

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Hi

Now J-Runner V3.0.0d is available to auto-update. Original links in OP are still the latest :)

V3.0.0d:
- Added: FTDI support for Xilinx XC2C64A-FG48 for Matrix "small-IC"
- Added: FTDI can now detect and check flash configs and motherboards
- Added: FTDI automatic board type detection on reading/writing
- Added: Query console button works with xFlasher now
- Fixed: Cannot write JTAG XeLL bins with xFlasher
- Fixed: Bug with timing programming of Zephyr timings
- Fixed: Various bugs and usability issues
- Fixed: Scan IP for console bug
- Changed: Tweaks to included timing files

Kind Regards,
Josh

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I don't think J-Runner knows what to do with 64MB small block images. I will look into this at some point in the future.

Kind Regards,
Josh

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Hello Josh,

thanks for all the great work you do supporting this platform.  I really enjoy your videos.  I recently did a RGH2 on a Zephyr following your online guide.

I made a couple observations along the way. 

First I could not get Xell to load at all using the timing files built into your latest release.  I can't say I tried them all but I did try at least most of them.  I also was patient, very patient, in my attempts trying each timing file for a few times.  So I literally a couple hours trying different ones which I was prepared for given that it was a Zephyr.  I am using the latest release V3.0.0d.  Then I found a download from another Youtuber with 4 files in it.  2 labeled zephyr_150 and 2 zephyr_300.  It was the second file I tried that worked zephyr_150_E_2_L_1.xsvf to boot Xell.  My ace v3 clock says 150MHz, not sure what bundled timing file are 150 vs 300.

While booting times are sort of inconsistent it does at least boot, sometimes 1st glitch and often 7 to 15 or more attempts.  So I don't know what is different about this timing file and the ones included in your J-runner release.  One thing I noticed is that my board has a label Rev A on it, and it has populated the big capacitor right beside the top Alt Rst point whereas the picture of your board online does not.

Also when I built the nand I did check SMC+, but I don't think I am seeing quicker glitching attempts.  The online guide says you can enable it, but the J-runner hint that pops up says for RGH 1.2 and S-RGH. 

I have selected Falcon as the board type during both image build attempts.  In the xebuild log file I see difference in the build when this is enable vs not. 

Under the Section labelled: Encrypting and finalizing bootloaders binary!

With SMC+ enabled; 

encoding SMC.bin size 0x3000
SMC checksum: df1fff40
unknown SMC found, type: Falcon v3.1(1.06)
glitch hack found in SMC binary!

Without SMC+ enabled; 

encoding smc.bin size 0x3000
SMC checksum: 7e5bc217
known clean SMC found, type: Zephyr v2.1(1.13)
patching SMC reset limit at offset: 0x12a3
SMC reset limit patched successfully!

Many thanks for all the support.

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